Reliability Analysis of FinFET Based High Performance Circuits

In the VLSI industry, ability to anticipate variability tolerance is essential understanding circuits’ potential future performance. The cadence virtuoso tool used in this study assess how PVT fluctuations affect various fin-shaped field effect transistor (FinFET) circuits. research, high-performance FinFET-based circuits at 7 nm are discussed with a variation temperature and voltage. idea behind technology improvement of power dissipation delay reduction rise reduced supply With use multi-gate predictive model, simulation carried out employing diverse domino logic node FinFET files. proposed set-reset circuit high-speed cascade method shows less compared existing current mirror footed domino, clocked delay, modified For high speed circuit, Monte Carlo done find mean standard deviation. simulations run on suggested for voltage from 0.7 V 0.3 V. comparison, results maximum decrease ones. Compared one, techniques achieve area reduction.